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Germanium Quantum Technology

01 /What can CMOS technology do for quantum computing? 02 /Semiconductor devices and scaling with industrial approach 03 /Semiconductor foundry facilities: the good and the bad for qubits 04 /IMEC's latest qubit developments 05 /Summary and outlook 06 /Semiconductors for spin qubits 07 /Germanium quantum wells on silicon 08 /Germanium quantum wells on silicon-germanium 09 /Growth methods 10 /Characterization techniques 11 /Electrical characterization of germanium quantum wells 12 /Fabrication of H-FET 13 /Semiconductor qubits: vision and challenges 14 /Quantum materials 15 /Quantum dot qubits and their operation 16 /Types of quantum dot qubits 17 /Qubit Readout 18 /Qubit Control 19 /Qubit Coherence and Fidelity 20 /Multi-qubit control and quantum algorithms 21 /Quantum links and scaling 22 /Physics of holes 23 /Hole spin qubits 24 /Introduction to electronics for quantum computing 25 /Room temperature electronics 26 /Cryogenic qubit chip carriers 27 /Contribution to IGNITE 28 /Quantum Control Stack for Spin Qubits 29 /Auto-tuning a quantum computer 30 /Tuning and operation of arrays 31 /Finding operation points example 32 /What is auto-tuning? 33 /Neural network tuning 34 /Navigating charge stability diagrams 35 /Experimental implementation 36 /Towards universal quantum algorithms 37 /Classical error correction 38 /Quantum error correction 39 /Progress and challenges 40 /Introduction to quantum algorithms 41 /The first algorithms 42 /Quantum annealing 43 /Quantum Machine Learning

Germanium quantum wells on silicon-germanium

The quantum well is then grown on the virtual substrate, under growth conditions which are optimized for precision rather than speed. This generally means a lower substrate temperature as well as a lower overall growth rate (and in the case of LEPECVD, a lower plasma density). In order to stabilize these conditions before the sensitive QW itself is grown, we grow 100-200 nm of SiGe matching the buffer composition. Then the QW followed is immediately by a SiGe cap. The SiGe layers above and below the Ge form the “barriers” for the QW. The structure is undoped so a metal gate (separated from the SiGe by an oxide) is used to pull charge into the quantum well and create a two-dimensional hole gas (2DHG). Eventually at strong gate bias, charge will also start to build up at the interface between the oxide and the SiGe. 

Prerequisite knowledge

  • Valence band structure of group-IV semiconductors. 
  • Particle-in-a-box Schrödinger equation. 

Main takeaways

  • Quantum wells are grown under carefully optimized conditions. 
  • The 2DHG is created by gate bias. 
  • The confinement potential is triangular because of the influence of charged particles on the potential. 
  • The maximum 2DHG density is reached when charge starts to accumulate at the SiGe/oxide interface. 
  • The maximum 2DHG density can be estimated from the depth of the confinement potential and the distance between the QW and the interface with the oxide. 

Further thinking

If the SiGe cap (εr = 15) between the Ge QW and the gate oxide is d = 20 nm thick, and the Ge content of the SiGe layer causes a band offset of ΔEv = 0.3 eV, what maximum sheet density would you expect to be able to achieve in the QW before charge would start to accumulate at the oxide interface?

a. 1.2×1011 cm-2
b. 6.0×1011 cm-2
c. 1.2×1012 cm-2
d. 6.0×1012 cm-2

Solution

Further reading

Textbooks which focus on the formation and the physics of two-dimensional carrier gases are for example The Physics of Low-Dimensional Semiconductors by J. H. Davies (Cambridge University Press, 1998), or Semiconductor Nanostructures: Quantum States and Electronic Transport by Thomas Ihn (Oxford University Press, 2010).